基于UCC28950的具有同步整流的绿色环保相移全桥控制器

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基于UCC28950的具有同步整流的绿色环保相移全桥控制器

　　1 Features

　　Enhanced Wide Range Resonant Zero Voltage Switching (ZVS) Capability

　　Direct Synchronous Rectifier (SR) Control

　　Light-Load Efficiency Management Including

　　Burst Mode Operation

　　Discontinuous Conduction Mode (DCM), Dynamic SR On and Off Control with Programmable Threshold

　　Programmable Adaptive Delay

　　Average or Peak Current Mode Control With Programmable Slope Compensation and Voltage Mode Control

　　Naturally Handles Pre-Biased Start Up With DCM Mode

　　Closed Loop Soft Start and Enable Function

　　Programmable Switching Frequency up to 1 MHz with Bi-Directional Synchronization

　　(±3%) Cycle-by-Cycle Current Limit Protection With Hiccup Mode Support

　　150-µA Start-Up Current

　　VDD Undervoltage Lockout

　　Wide Temperature Range –40°C to +125°C

　　2 Applications

　　Phase-Shifted Full-Bridge Converters

　　Datacom, Telecom, and Wireless Base-Station Power

　　Server, Power Supplies

　　Industrial Power Systems

　　High-Density Power Architectures

Solar Inverters, and Electric Vehicles

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　　3 Description

　　The UCC28950 enhanced phase-shifted controller builds upon Texas Instrument’s industry standard UCx895 phase-shifted controller family with enhancements that offer best in class efficiency in today’s high performance power systems. The UCC28950 implements advanced control of the full-bridge along with active control of the synchronous rectifier output stage.

　　The primary-side signals allow programmable delays to ensure ZVS operation over wide-load current and input voltage range, while the load current naturally tunes the secondary-side synchronous rectifiers switching delays, maximizing overall system efficiency.

　　The UCC28950 also offers multiple light-load management features including burst mode and dynamic SR on/off control when transitioning in and out of Discontinuous Current Mode (DCM) operation, ensuring ZVS operation is extended down to much lighter loads.

　　In addition, the UCC28950 includes support for current or voltage mode control. Programmable switching frequency up to 1 MHz and a wide set of protection features including cycle-by-cycle current limit, UVLO and thermal shutdown. A 90-degree phase-shifted interleaved synchronized operation can be easily arranged between two converters.

　　The UCC28950 is available in TSSOP-24 package.

　　The UCC28950 device combines all the functions necessary to control a phase-shifted full bridge power stage in a 24-pin TSSOP package. The device includes two Synchronous-Rectifier (SR), gate-drive outputs as well as the outputs needed to drive all four switches in the full-bridge circuit. The dead times between the upper and lower switches in the full bridge may be set using the DELAB and DELCD inputs. Further, this dead time may be dynamically adjusted according to the load level using the ADEL pin. This allows the user to optimize the dead time for their particular power circuit and to achieve ZVS over the entire operating range. In a similar manner, the dead times between the full bridge switches and the secondary SRs may be optimized using the DELEF input. This dead time may also be dynamically adjusted according to the load, using the ADELEF input to the controller. A DCM (Discontinuous Conduction Mode) option disables the SRs at a user settable light load in order to improve power circuit efficiency. The device enters a light-load-burst mode if the feedback loop demands a conduction time less than a user settable level (TMIN).

　　At higher-power levels, two or more UCC28950 devices may be easily synchronized in a Master/Slave configuration. A SS/EN input may be used to set the length of the soft start process and to turn the controller on and off. The controller may be configured for Voltage mode or Current mode control. Cycle-by-cycle current limiting is provided in Voltage mode and Peak Current mode. The switching frequency may be set over a wide range making this device suited to both IGBT and MOSFET based designs.

　　Before the UCC28950 controller will start up, the following conditions must be met:

　　VDD voltage exceeds rising UVLO threshold 7.3-V typical.

　　The 5-V reference voltage is available.

　　Junction temperature is below the thermal shutdown threshold of 140°C.

　　The voltage on the soft-start capacitor is not below 0.55-V typical.

　　If all those conditions are met, an internal enable signal EN is generated that initiates the soft start process. The duty cycle during the soft start is defined by the voltage at the SS pin, and cannot be lower than the duty cycle set by TMIN, or by cycle-by-cycle current limit circuit depending on load conditions.

　　Voltage Reference (VREF)

　　The accurate (±1.5%) 5-V reference voltage regulator with a short circuit protection circuit supplies internal circuitry and provides up to 20-mA external output current. Place a low ESR and ESL, preferably ceramic decoupling capacitor CREF in 1-µF to 2.2-µF range from this pin to GND as close to the related pins as possible for best performance. The only condition where the reference regulator is shut down internally is during under voltage lockout.

　　Error Amplifier (EA+, EA–, COMP)

　　The error amplifier has two uncommitted inputs, EA+ and EA-, with a 3-MHz unity gain bandwidth, which allows flexibility in closing the feedback loop. The EA+ is a non-inverting input, the EA– is an inverting input and the COMP is the output of the error amplifier. The input voltage common mode range, where the parameters of the error amplifier are guaranteed, is from 0.5 V to 3.6 V. The output of the error amplifier is connected internally to the non-inverting input of the PWM comparator. The range of the error amplifier output of 0.25 V to 4.25 V far exceeds the PWM comparator input ramp-signal range, which is from 0.8 V to 2.8 V. The soft-start signal serves as an additional non-inverting input of the error amplifier. The lower of the two non-inverting inputs of the error amplifier is the dominant input and sets the duty cycle where the output signal of the error amplifier is compared with the internal ramp at the inputs of the PWM comparator.

　　Soft Start and Enable (SS/EN)

　　The soft-start pin SS/EN is a multi-function pin used for the following operations:

　　Closed loop soft start with the gradual duty cycle increase from the minimum set by TMIN up to the steady state duty cycle required by the regulated output voltage.

　　Setting hiccup mode conditions during cycle-by-cycle overcurrent limit.

　　On/off control for the converter.

　　During soft start, one of the voltages at the SS/EN or EA+ pins, whichever is lower (SS/EN – 0.55 V) or EA+ voltage (see Block Diagram), sets the reference voltage for a closed feedback loop. Both SS/EN and EA+ signals are non-inverting inputs of the error amplifier with the COMP pin being its output. Thus the soft start always goes under the closed feedback loop and the voltage at COMP pin sets the duty cycle. The duty cycle defined by the COMP pin voltage can not be shorter than TMIN pulse width set by the user. However, if the shortest duty cycle is set by the cycle-by-cycle current limit circuit, then it becomes dominant over the duty cycle defined by the COMP pin voltage or by the TMIN block.

　　The soft-start duration is defined by an external capacitor CSS, connected between the SS/EN pin and ground, and the internal charge current that has a typical value of 25 µA. Pulling the soft-start pin externally below 0.55 V shuts down the controller. The release of the soft-start pin enables the controller to start, and if there is no current limit condition, the duty cycle applied to the output inductor gradually increases until it reaches the steady state duty cycle defined by the regulated output voltage of the converter.