基于LP5912-Q1的用于 RF 和模拟电路的超低噪声、500mA 线性稳压器

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基于LP5912-Q1的用于 RF 和模拟电路的超低噪声、500mA 线性稳压器

　　1 特性

　　适用于汽车电子 应用

　　具有符合 AEC Q100 的下列结果：

　　器件温度 1 级：-40℃ 至 +125℃ 的环境运行温度范围

　　器件人体放电模式 (HBM) 分类等级 2

　　器件组件充电模式 (CDM) 分类等级 C6

　　输入电压范围：1.6V 至 6.5V

　　输出电压范围：0.8V 至 5.5V

　　输出电流最高达 500 mA

　　低输出电压噪声：12µVRMS 典型值

　　1kHz 时的电源抑制比 (PSRR)：75dB(典型值)

　　输出电压容差 (VOUT ≥ 3.3V)：±2%

　　低 IQ(使能时，无负载)：30µA(典型值)

　　低压降 (VOUT ≥ 3.3V)：500mA 负载时典型值为 95mV

　　与 1µF 陶瓷输入和输出电容搭配使用，性能稳定

　　热过载保护和短路保护

　　反向电流保护

　　无需噪声旁路电容

　　自动输出放电实现快速关断

　　电源正常状态输出具有 140µs 典型延迟

　　内部软启动限制浪涌电流

　　–40°C 至 +125°C 的运行结温范围

　　2 应用

　　车用信息娱乐

　　车载通讯系统

　　高级驾驶员辅助系统 (ADAS) 摄像机和雷达

　　导航系统

　　3 说明

　　LP5912-Q1 是一款能提供高达 500mA 输出电流的低噪声 LDO。LP5912-Q1 器件专为满足射频 (RF) 和模拟电路的要求而设计，具备低噪声、高 PSRR、低静态电流以及低线路或负载瞬态响应等特性。LP5912-Q1 无需噪声旁路电容便可提供出色的噪声性能，并且支持远距离安置输出电容。

　　此器件适合与 1µF 输入和 1µF 输出陶瓷电容搭配使用(无需独立的噪声旁路电容)。

　　其固定输出电压介于 0.8V 和 5.5V 之间(以 25mV 为单位增量)。

　　The LP5912-Q1 is a low-noise, high PSRR, LDO capable of sourcing a 500-mA load. The LP5912-Q1 can operate down to 1.6-V input voltage and 0.8-V output voltage. This combination of low noise, high PSRR, and low output voltage makes the device an ideal low dropout (LDO) regulator to power a multitude of loads from noise-sensitive communication components to battery-powered system.

　　1.1 Enable (EN)

　　The LP5912-Q1 EN pin is internally held low by a 3-MΩ resistor to GND. The EN pin voltage must be higher than the VEN(ON) threshold to ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the VEN(OFF) threshold to ensure that the device is fully disabled and the automatic output discharge is activated.

　　When the device is disabled the output stage is disabled, the PG output pin is low, and the output automatic discharge is ON.

　　1.2 Output Automatic Discharge (RAD)

　　The LP5912-Q1 output employs an internal 100-Ω (typical) pulldown resistance to discharge the output when the EN pin is low. Note that if the LP5912-Q1 EN pin is low (the device is OFF) and the OUT pin is held high by a secondary supply, current flows from the secondary supply through the automatic discharge pulldown resistor to ground.

　　1.3 Reverse Current Protection (IRO)

　　The LP5912-Q1 input is protected against reverse current when output voltage is higher than the input. In the event that extra output capacitance is used at the output, a power-down transient at the input would normally cause a large reverse current through a conventional regulator. The LP5912-Q1 includes a reverse voltage detector that trips when VIN drops below VOUT, shutting off the regulator and opening the PMOS body diode connection, preventing any reverse current from the OUT pin from flowing to the IN pin.

　　If the LP5912 EN pin is low (the LP5912 is OFF) and the OUT pin is held high by a secondary supply, current flows from the secondary supply through the automatic discharge pulldown resistor to ground. This is not reverse current, this is automatic discharge pulldown current.

　　Note that reverse current (IRO) is measured at the IN pin.

　　1.4 Internal Current Limit (ISC)

　　The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate continuously at the ISC current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. Note also that if a current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO, resulting in a thermal shutdown of the output.

　　1.5 Thermal Overload Protection (TSD)

　　Thermal shutdown disables the output when the junction temperature rises to approximately 160°C, which allows the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry enables. Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a result of overheating.

　　1.6 Power-Good Output (PG)

　　The LP5912-Q1 device has a power-good function that works by toggling the state of the PG output pin. When the output voltage falls below the PG threshold voltage (PGLTH), the PG pin open-drain output engages (low impedance to GND). When the output voltage rises above the PG threshold voltage (PGVHTH), the PG pin becomes high impedance. By connecting a pullup resistor to an external supply, any downstream device can receive PG as a logic signal. Make sure that the external pullup supply voltage results in a valid logic signal for the receiving device or devices. Use a pullup resistor from 10 kΩ to 100 kΩ for best results.

　　The input supply, VIN, must be no less than the minimum operating voltage of 1.6 V to ensure that the PG pin output status is valid. The PG pin output status is undefined when VIN is less than 1.6 V.

　　In power-good function, the PG output pin being pulled high is typically delayed 140 µs after the output voltage rises above the PGHTH threshold voltage. If the output voltage rises above the PGHTH threshold and then falls below the PGLTH threshold voltage the PG pin falls immediately with no delay time.

If the PG function is not needed, the pullup resistor can be eliminated, and the PG pin can be either connected to ground or left floating.

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