基于UCC28722的Constant-Voltage, Constant-Current Controller with Primary-Side...

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基于UCC28722的Constant-Voltage, Constant-Current Controller with Primary-Side Regulation..

　　1 特性

　　低于 50mW 的无负载功耗

　　一次侧稳压 (PSR) 免除了对光耦合器的需要

　　动态双极性结型晶体管 (BJT) 驱动

　　线路和负载具有 ±5% 电压调节和电流调节能力

　　80kHz 最大开关频率可实现高功率密度充电器设计

　　针对最高总体效率的准谐振谷值开关运行

　　宽 VDD 范围允许使用小型偏置电容器

　　输出过压、低线路和过流保护功能

　　可编程电缆补偿

　　小外形尺寸晶体管 (SOT) 23-6 封装

　　2 应用

　　用于消费类电子产品的 USB 兼容适配器和充电器

　　智能电话

　　平板电脑

　　摄像机

　　适用于电视和台式机的备用电源

白色家电

TI产品现货库存在线购买：https://www.iczoom.com/brand/509-c-1-20.html

　　3 说明

　　UCC28722 反激电源控制器无需使用光耦合器即可提供单独输出的恒定电压 (CV) 和恒定电流 (CC) 输出稳压。此器件处理来自一次侧电源开关和辅助反激式绕组的信息，以对输出电压和电流进行精确控制。

　　可动态控制工作状态并定制调制配置文件，支持在所有负载条件下高效运行，并且不会影响输出瞬态响应。

　　UCC28722 所采用的控制算法使得工作效率符合甚至超过现行标准。输出驱动接口与双极型晶体管功率开关相连实现了低成本转换器设计。带有谷值开关的断续导通模式 (DCM) 减少了开关损耗，调制开关频率和一次侧峰值电流振幅(FM 和 AM)可在整个负载和线路范围内保持高转换效率。

　　此控制器的最大开关频率为 80kHz，并且一直保持对变压器内峰值一次侧电流的控制。输出过压和过流以及输入欠压保护 特性 有助于抑制一次侧和二次侧应力分量。此外，UCC28722 可通过设定外部电阻来补偿电缆中的压降。

　　The UCC28722 is a flyback power supply controller that provides accurate voltage and constant current regulation with primary-side feedback, eliminating the need for opto-coupler feedback circuits. The controller operates in discontinuous conduction mode with valley-switching to minimize switching losses. The modulation scheme is a combination of frequency and primary peak current modulation to provide high conversion efficiency across the load range. The control law provides a wide-dynamic operating range of output power, which allows the power designer to achieve less than 75-mW of stand-by power.

　　During low-power operating ranges, the device has power-management features to reduce the device operating current at operating frequencies below 28 kHz. Accurate voltage and constant current regulation, fast dynamic response, and fault protection are achieved with primary-side control. A complete charger solution can be realized with a straightforward design process, low cost and low component count.

　　The VDD pin is connected to a bypass capacitor to ground. The VDD turnon UVLO threshold is 21 V and turnoff UVLO threshold is 7.7 V, with an available operating range up to 35 V on VDD. The USB charging specification requires the output current to operate in constant-current mode from 5 V to a minimum of 2 V, which is easily achieved with a nominal VDD of approximately 22 V. The additional VDD headroom (up to 35 V) allows for VDD to rise due to the leakage energy delivered to the VDD capacitor in high-load conditions.

　　It is possible for the start-up resistor to supply more current to the VDD node than the IC will consume at higher bulk input voltages. A Zener diode clamp is required on the VDD pin to keep the VDD pin voltage within limits if this is the case.

　　There is one ground reference external to the device for the base drive current and analog signal reference. TI recommends placing the VDD bypass capacitor close to GND and VDD with short traces to minimize noise on the VS and CS signal pins.

　　The VS pin is connected to a resistor divider from the auxiliary winding to ground. The output-voltage feedback information is sampled at the end of the transformer secondary current demagnetization time to provide an accurate representation of the output voltage. Timing information for achieving valley-switching and to control the duty cycle of the secondary transformer current is determined by the waveform on the VS pin. Avoid placing a filter capacitor on this input because it would interfere with accurate sensing of this waveform.

　　The VS pin also senses the bulk capacitor voltage to provide for AC-input run and stop thresholds, and to compensate the current-sense threshold across the AC-input range. During the transistor on-time, the VS pin is clamped to approximately 250 mV below GND and the current out of the VS pin is sensed. For the AC-input run and stop function, the run threshold on VS is 225 µA and the stop threshold is 80 µA.