基于250mA 超低噪声低压差稳压器

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　　描述

　　LP5907 是一款能提供高达 250mA 输出电流的低噪声 LDO。此器件专门针对射频和模拟电路而设计，可满足其低噪声、高 PSRR、低静态电流以及低线路或负载瞬态响应系数等诸多要求。LP5907 采用创新的设计技术，无需噪声旁路电容便可提供出色的噪声性能，并且支持远距离安置输出电容。

　　此器件可与 1µF 输入和 1µF 输出陶瓷电容搭配使用(无需独立的噪声旁路电容)。

　　其固定输出电压介于 1.2V 至 4.5V 之间(阶跃为 25mV)。如需特定的电压选项，请联系德州仪器 (TI) 销售代表。

　　特性

　　输入电压范围：2.2V 至 5.5V

　　输出电压范围：1.2V 至 4.5V

　　与 1µF 陶瓷输入和输出电容搭配使用，性能稳定

　　无需噪声旁路电容

　　支持输出电容远端布置

　　热过载保护和短路保护

　　运行结温范围：-40°C 至 125°C

　　低输出电压噪声：< 6.5µVRMS

　　电源抑制比 (PSRR)：1kHz 频率时为 82dB

　　输出电压容差：±2%

　　极低 IQ(启用)：12µA

　　低压降：120mV(典型值)

　　应用

　　移动电话、平板电脑

　　数码相机和音频设备

　　便携式和电池供电类设备

　　便携式医疗设备

　　智能仪表和现场变送器

　　RF、PLL、VCO 和时钟电源

　　IP 摄像机

　　无人机

　　4 Detailed Description

　　4.1 Overview

　　Designed to meet the needs of sensitive RF and analog circuits, the LP5907 provides low noise, high PSRR, low quiescent current, as well as low line and load transient response figures. Using new innovative design techniques, the LP5907 offers class leading noise performance without the need for a separate noise filter capacitor.

　　The LP5907 is designed to perform with a single 1-µF input capacitor and a single 1-µF ceramic output capacitor. With a reasonable PCB layout, the single 1-µF ceramic output capacitor can be placed up to 10 cm away from the LP5907 device.

　　4.2 Functional Block Diagram

　　4.3 Feature Description

　　4.3.1 Enable (EN)

　　The LP5907 EN pin is internally held low by a 1-MΩ resistor to GND. The EN pin voltage must be higher than the VIH threshold to ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the VIL threshold to ensure that the device is fully disabled and the automatic output discharge is activated.

　　4.3.2 Low Output Noise

　　Any internal noise at the LP5907 reference voltage is reduced by a first order low-pass RC filter before it is passed to the output buffer stage. The low-pass RC filter has a –3 dB cut-off frequency of approximately 0.1 Hz.

　　4.3.3 Output Automatic Discharge

　　The LP5907 output employs an internal 230-Ω (typical) pulldown resistance to discharge the output when the EN pin is low, and the device is disabled.

　　4.3.4 Remote Output Capacitor Placement

　　The LP5907 requires at least a 1-µF capacitor at the OUT pin, but there are no strict requirements about the location of the capacitor in regards the OUT pin. In practical designs, the output capacitor may be located up to 10 cm away from the LDO.

　　4.3.5 Thermal Overload Protection (TSD)

　　Thermal shutdown disables the output when the junction temperature rises to approximately 160°C which allows the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry enables. Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a result of overheating.

　　The thermal shutdown circuitry of the LP5907 has been designed to protect against temporary thermal overload conditions. The TSD circuitry was not intended to replace proper heat-sinking. Continuously running the LP5907 device into thermal shutdown may degrade device reliability.

　　4.4 Device Functional Modes

　　4.4.1 Enable (EN)

　　The LP5907 Enable (EN) pin is internally held low by a 1-MΩ resistor to GND. The EN pin voltage must be higher than the VIH threshold to ensure that the device is fully enabled under all operating conditions.

　　When the EN pin is pulled low, and the output is disabled, the output automatic discharge circuitry is activated. Any charge on the OUT pin is discharged to GND through the internal 230-Ω (typical) pulldown resistance.

　　4.4.2 Minimum Operating Input Voltage (VIN)

The LP5907 does not include any dedicated UVLO circuitry. The LP5907 internal circuitry is not fully functional until VIN is at least 2.2 V. The output voltage is not regulated until VIN has reached at least the greater of 2.2 V or (VOUT + VDO).

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